Add a post announcing RISC-V support - #123
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| Over the last few months, I’ve been working on improving CPython’s support for | ||
| the RISC-V architecture, and I’m thrilled to announce that RISC-V is now | ||
| officially supported by CPython as a Tier 3 platform! 🎉 🚀 |
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| officially supported by CPython as a Tier 3 platform! 🎉 🚀 | |
| officially supported by CPython as a tier 3 platform! 🎉 🚀 |
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| [RISC-V](https://riscv.org/) is an open [instruction set architecture (ISA)](https://en.wikipedia.org/wiki/Instruction_set_architecture). Importantly, | ||
| unlike proprietary instruction sets (e.g., x86 and ARM), it is developed as an |
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| unlike proprietary instruction sets (e.g., x86 and ARM), it is developed as an | |
| unlike proprietary instruction sets (such as x86 and ARM), it is developed as an |
| A particularly important part of this has been having reliable, ongoing testing | ||
| on real RISC-V hardware. I’d like to thank the [RISE Project](https://riseproject.dev/) for their | ||
| support. RISE has kindly provided several RISC-V machines for CPython, | ||
| giving us Buildbots for testing as well as debugging architecture-specific issues. |
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| giving us Buildbots for testing as well as debugging architecture-specific issues. | |
| giving us buildbots for testing as well as debugging architecture-specific issues. |
| giving us Buildbots for testing as well as debugging architecture-specific issues. | ||
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| I’d especially like to thank [Ludovic Henry](https://fr.linkedin.com/in/ludovic-dev) from the RISE Project, | ||
| [Furkan Onder](https://github.com/furkanonder), and [Emma Smith](https://github.com/emmatyping), along with the many others who have |
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@furkanonder @emmatyping Eouo you prefer your websites here?
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| [Furkan Onder](https://github.com/furkanonder), and [Emma Smith](https://github.com/emmatyping), along with the many others who have | |
| [Furkan Onder](https://pypy.trade/), and [Emma Smith](https://emmatyping.dev/), along with the many others who have |
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| ## What’s next? | ||
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| While [Tier 3 support](https://peps.python.org/pep-0011/#tier-3) is an important milestone, there’s plenty more to do. |
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| While [Tier 3 support](https://peps.python.org/pep-0011/#tier-3) is an important milestone, there’s plenty more to do. | |
| While [tier 3 support](https://peps.python.org/pep-0011/#tier-3) is an important milestone, there’s plenty more to do. |
And I suggest linking first mention instead, so when readers first encounter an unfamiliar term, they can find the definition immediately.
| We are currently investigating how to improve our testing further by bringing | ||
| RISC-V directly into CPython’s CI, again kindly supported by RISE with their | ||
| [RISE RISC-V Runners initiative](https://riscv-runners.riseproject.dev/). This should give contributors faster | ||
| feedback than the [Buildbots](https://buildbot.python.org/) (which currently run *after* a patch is merged) |
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| feedback than the [Buildbots](https://buildbot.python.org/) (which currently run *after* a patch is merged) | |
| feedback than the [buildbots](https://buildbot.python.org/) (which usually run *after* a patch is merged) |
| feedback than the [Buildbots](https://buildbot.python.org/) (which currently run *after* a patch is merged) | ||
| and would allow us to catch RISC-V-specific problems earlier. | ||
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| In the long term, I’d also love to work towards promoting RISC-V to Tier 2 support. |
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| In the long term, I’d also love to work towards promoting RISC-V to Tier 2 support. | |
| In the long term, I’d also love to work towards promoting RISC-V to tier 2 support. |
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Consider a shorter slug. At least delete the hyphens between risc and v, and c and python.
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CC @luhenry @emmatyping @furkanonder